Generally, semiconductor integrated circuits that operate with a high frequency current can include high frequency passive circuit elements such as inductors, capacitors and resistors. Of such components, inductors are typically formed on an uppermost layer of a semiconductor integrated circuit in order to provide as much separation as possible between the inductors and other circuit elements. Because inductors are typically situated on an uppermost layer, relatively long extension lines are connected to both ends of the inductor in order to connect an inductor to a high frequency power source, or some other such circuit element.
Referring now to FIG. 5, a plan view shows an example of conventional extension lines for an inductor. As shown in FIG. 5, extension lines 6 can be connected to both ends of an inductor 1. One extension line 6 may be connected to a high frequency power source (not shown) by way of a through hole (not shown). The other extension line 6 can be connected to another circuit element (not shown), such as a capacitor or transistor, for example, by way of another through hole (not shown). In such an arrangement, a relatively high frequency current can be caused to flow through the two extension lines 6 and inductor 1.
A conventional approach, like that of FIG. 5, can have drawbacks, however. In recent years, a frequency at which current flows through integrated circuits has continued to increase. At such higher frequencies, a resistance presented by extension lines 6 may increase due to the “skin effect.” Still further, a high frequency operating current can result in increased parasitic inductance in extension lines 6. The skin effect is a phenomenon in which when high frequency current flows through a conductor, a current flow can be concentrated at the vicinity of the conductor surface. As a result, very little current can flow through a center portion of a conductor, resulting in a decrease in effective conductor cross section, and hence an increase in resistance.
Increased parasitic inductance, due to high frequency current in extension lines 6, can add to the inductance of an inductor 1. Thus, a resulting inductance in a device can deviate from the designed inductance value presented by an inductor 1. Such undesirable deviations from an intended inductance value may lead to undesirable deviations in the frequency of a signal generated by an integrated circuit, and/or malfunctions in operation, in some cases. Because, as described above, extension lines may be relatively long when compared with other wiring lines of a semiconductor integrated circuit, such lines can present undesirably large resistance and inductance values when operating with a high frequency current.
In order to address the above problem, several conventional techniques have been proposed. In Japanese Patent Publication 08-288463 A (JP 08-288463 A), a technique is disclosed in which a width of a wiring line may vary in the direction of a wiring line thickness (i.e., irregularities are formed on sides of a wiring line). JP 08-288463 A indicates that such a technique can increase a surface area of a wiring line, and hence reduce increases in resistance resulting from the skin effect.
In addition, Japanese Patent Publication 09-082708 A (JP 09-082708 A) shows a technique in which a wiring line is formed that has a U-like cross sectional shape. This technique can make it possible to increase surface area, and thus, suppress an increase in resistance of a wiring line due to the skin effect.
Furthermore, Japanese Patent Publication 2000-232202 A (JP 2000-232202) discloses a technique for forming a two-layer wiring line for an inductor. JP 2000-232202 indicates that such a technique makes it possible to increase a surface area of a wiring line to thereby reduce a resistance of an inductor.
The above-mentioned conventional techniques may suffer from a number of drawbacks. In the case of making a thickness vary in the direction of a wiring line width, like that shown in JP 08-288463 A, a large number of process steps may be required to form such a complicated cross sectional shape. This can make manufacturing such wires more complicated and/or more costly. In addition, such an approach is not believed to reduce parasitic inductance.
In the case of making wiring lines with U-shaped cross sections, like that shown in JP 09-082708 A, a large number of process may also be required to form such a structure. Further, this technique is also not believed to reduce parasitic inductance of such wiring lines.
In the case of forming a two-layer wiring line for an inductor, like that shown in JP 2000-232202, such a technique may require a large number of process steps. In addition, while not described in JP 2000-232202, the present inventors and others have found that such a division in a wiring line for an inductor can lead to a reduction in an inductance of the inductor. Reasons why division in wiring lines can result in decreased inductance will be described in more detail below.
In light of the above, it would be desirable to address the above drawbacks to conventional approaches to providing wiring for high frequencies. Thus, it would be desirable to provide a wiring line for high frequency that has a relatively small resistance and/or low parasitic inductance when a high frequency current flows therethrough. It would also be desirable to provide a high frequency wiring line with such benefits that may be manufactured with fewer steps and/or more readily than conventional approaches.